PHS6

Resolution: 1ps (+/- 5%)

Max. phase shiftting: 200ps in each direction

6 independent Output channels

Single-ended clock input

Ref. Clock output

Prospectively: multiple phase shifter interconnection for 12 channels and more

Applications

Pattern generator/BERT TX-Channel multiplexing

Cross talk measurement

Name	PHS6
Description	Phase Shifter 6 Channel for Parallex System, 1 Clock in, 6 shifted Clocks out
Output-Reference Clock Output Duty Cycle	40 – 60%
Output-Reference Clock Output Impedance	45 – 55 Ω
Output-Reference Clock Output Voltage Swing	550 – 950 mV
Output-Reference Clock Output Termination	AC – coupled
Warm Up Time	30 min
Output-Random Jitter	2 psRMS
Input-Reference Clock Rise and Fall Time	90 – 350 ps
Output-Reference Clock Output phase shift total	±200 ps
Input-Reference Clock Input Duty Cycle	45 – 55 %
Input-Reference Clock Input Impedance	45 – 55 Ω
Input_Reference Clock Input Termination	AC – coupled
Input-Reference Clock Input Voltage Swing	500 – 1400 mV
Input-Reference Clock Input Frequency	400 – 850 MHz
Output-Reference Clock Rise and Fall Time	50 – 350 ps
Output-Cycle to Cycle Jitter	2 psRMS
Output-Reference Clock Output phase uncertainty	±5[ps] – ±10[%]
Output-Total Jitter	18 psPP
Output-Reference Clock Output increment of phase shift fine tuning	1 ps
Operation Temperature	10 – 50 °C

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