Features
- True parallel bit-error-rate measurement across 8 lanes
- Continuous data rate selection from 1 Gbps – 32 Gbps
- Fully synthesized integrated jitter injection on all lanes
- Programmable output voltage for receiver stress test applications
- Two-tap pre-emphasis control
- Capability to measure eye diagrams, bathtub plots and BER
- Flexible loopback support per lane
- Hardware clock recovery per lane
- State of the art programming environment based on the highly intuitive Python language
- Reconfigurable, protocol customization (on request)
Applications
- Parallel PHY validation of serial bus standards
- Parallel PHY validation and eye margining
- Interface tests of electrical/optical media
- Passive device testing
- At-speed production tests