SV4E-SLVSEC

BERT/SerDes Testers

Quick Overview

16-Lane, 6.5 Gbps Protocol Analyzer

Call For Availability

More Information
name SV4E-SLVSEC
Description 16-Lane, 6.5 Gbps Protocol Analyzer
Max Data Rate 6.5Gbps
Rx Channels 16
Number of GPIO pins 16
Programmable On-Board Power Supplies 6
Supported Pixel Formats RAW8, RAW10, RAW12, RAW14, RAW16 RGB888* (* not part of SVLS-EC standard)
Packet Analysis Yes
Frame Analysis Yes
CRC Analysis Yes
Memory Depth 8 Gb

Quick Overview

Features 

  • Physical Layer Receiver: up to 16 receiver lanes operating at 6.5 Gbps per lane and featuring integrated per-lane clock recovery
  • Complete Protocol Flexibility: sophisticated analysis core provides support for basic and multiple-interface topologies that are integrated into the most advanced image sensor architectures
  • Capture Memory: 8 GBytes of available memory for complete data capture (headers, payloads, and footers) spanning multiple image frames at high resolutions
  • Diagnostics: Detailed data analysis including payload extraction and error detection
  • I2C Master: built-in I2C controller for programming sensors and providing true host emulation capability integrated within the Introspect ESP Software
  • Programmable Power Supplies: six built-in power supplies for devices under test, with control and current monitoring functions integrated within the Introspect ESP Software 

    Benefits 

  • Self-Contained: an all‐in‐one system enables the simplest bench environment for protocol validation applications
  • Automated: leverages the full power of Python and the award-winning Introspect ESP Software. Scripting capability is ideal for debug tasks and full‐fledged production screening of devices and system modules
  • Multiple Interface Topologies: protect your investment by adopting a high-performance tool for multiple applications and across a large span of sensor topologies
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